The present invention relates to the field of data processing, and more particularly to a method and apparatus for floating point arithmetic.
Many computer systems include processors having specialized arithmetic circuitry to operate on floating point numbers. Specialized circuitry is required because, unlike fixed-point numbers, floating point numbers are represented by a normalized component called a mantissa, and an exponent. Before adding or subtracting two floating point numbers, the difference of their exponents is obtained to adjust and align these numbers. The exponent difference is amount needed to shift one of the floating point mantissa. This process is known as denormalization.
To speed up the floating point calculations, the exponent difference is compared with the maximum shift value number, which is predetermined based upon the precision of the floating point operation. If the difference is equal or greater than the maximum shift value, the shift operation is bypassed. Otherwise, the difference controls the amount of shift.
The exponent difference is typically calculated using the subtractors (or adders), causing a long processing time because the adder must be finished before the exponent difference can be compared. Furthermore, when two floating point numbers are close in values, the result of an addition or subtraction undergoes a complex normalization, which is the reverse of the denormalization. This requires still more logic and delays to implement, thereby increasing power consumption, circuit size and fabrication cost.